# Semiconductor manufacturing: how the industry works Canonical: https://industrywiki.org/industry/semiconductor-manufacturing/ Published: 2026-10-26 Semiconductor manufacturers turn circuit designs into tested chips. Their economics depend on process capability, manufacturing yield, equipment availability, and the demand for specific chips. ## scope Covers wafer fabrication, assembly, packaging, and testing. Chip design and semiconductor equipment are adjacent businesses, not interchangeable production stages. The operating model is global; company examples illustrate business structures rather than market-wide performance. ## segments ### name Foundries ### description Manufacture customers’ designs using qualified processes. The customer normally owns the chip design, while the foundry supplies process technology and production capacity. ### name Integrated device manufacturers ### description Combine design and manufacturing; some also sell foundry services. Memory, logic, analog, and power devices have different demand cycles and process needs. ### name Assembly and test ### description Package dies, make electrical connections, manage heat, and verify performance. Advanced packaging can become a separate capacity constraint. ## flow ### name Design and qualify ### description Translate the design into masks and a process-compatible layout. Qualification establishes that the design and manufacturing process work together. ### name Build the wafer ### description Repeat deposition, lithography, etching, and other operations to form devices and interconnects. Inspection feeds measurements back into process control. ### name Probe and select ### description Test dies while they remain on the wafer. A finished wafer is not equivalent to a wafer full of saleable chips. ### name Package and test ### description Separate dies, assemble packages, and perform final testing. Sorting by performance can produce several saleable product grades. ## economics ### revenue Unit A processed wafer, a packaged device, or a contracted assembly/test operation, depending on the supplier. ### payers Fabless designers buy foundry capacity; device companies buy packaging and testing. Electronics manufacturers ultimately purchase chips directly or through distributors. ### costs #### name Equipment and facilities #### explanation Depreciation, maintenance, and cleanroom infrastructure create substantial costs even when production is below plan. #### name Process execution #### explanation Materials, specialist labor, electricity, water treatment, and repeated tool steps accumulate before the finished chip can be sold. ### capital A fab requires specialized equipment and infrastructure. A capacity expansion is useful only if it supports the processes and products customers actually need. ### working Capital Wafers spend time in production before shipment and payment. A demand change can strand expensive work in progress or finished inventory. ### mechanism Yield is the share of potential dies meeting requirements. Higher yield spreads wafer-processing cost over more good dies. Utilization spreads factory overhead across more production. These are different levers: a full fab with poor yield can still have bad economics. ## operations ### activities - Process integration and recipe control - Tool scheduling, maintenance, and contamination control - Electrical testing, failure analysis, and product qualification ### assets - Cleanrooms and lithography systems - Deposition, etch, inspection, and test equipment ### roles - Process and equipment engineers - Yield analysts and production planners ### records - Wafer lot histories and process measurements - Test results and approved process changes ### software - Manufacturing execution and statistical process control - Design enablement and production scheduling ### metrics #### name Die yield #### definition Good dies divided by tested candidate dies, with the test boundary stated. #### why Links defect and performance problems to saleable output. #### name Cycle time #### definition Elapsed time from wafer start to completion for a defined route. #### why Long queues tie up cash and slow learning. #### name Tool availability #### definition Scheduled time when a specified tool can process work. #### why A bottleneck tool can constrain the whole fabrication route. ## structure - A process label alone does not make two factories interchangeable. Design rules, libraries, reliability qualification, and packaging choices bind a product to a production system. Moving an established design can require redesign and validation, creating switching costs. - Demand is segmented. Excess capacity for one type of memory or mature process does not automatically resolve a shortage in another process or advanced packaging step. A useful capacity map therefore follows compatible process routes rather than simply counting factories. ## risks ### risk Yield excursion ### mechanism A process deviation can affect many lots before final testing reveals the problem; traceability determines which material must be held. ### risk Demand and capacity mismatch ### mechanism Orders can retreat faster than factories and equipment can be repurposed, depressing utilization. ### risk Infrastructure interruption ### mechanism Power, water, or critical-material disruption can stop tightly sequenced production and damage work in progress. ## dependencies ### upstream #### slug electric-utilities #### label Electric utilities #### relationship Supply the continuous power needed for process equipment and controlled facilities. #### slug water-utilities #### label Water utilities #### relationship Provide feedwater that fabs further treat to process-specific purity. ### downstream #### slug automobile-manufacturing #### label Automobile manufacturing #### relationship Uses control, sensing, connectivity, and power-management devices. #### slug telecommunications #### label Telecommunications #### relationship Uses chips in network equipment and devices. ### substitutes #### label Alternative chip architectures #### relationship Different designs may deliver the required function, but qualification, software compatibility, and performance constrain substitution. ## worked Example ### title How yield changes cost per good die ### assumptions - Illustrative wafer-processing cost: $12,000, excluding packaging, development, and corporate overhead. - A wafer has 600 candidate dies; compare 70% and 85% die yield. ### calculation - At 70% yield: 600 × 0.70 = 420 good dies; $12,000 ÷ 420 = $28.57 per good die. - At 85% yield: 600 × 0.85 = 510 good dies; $12,000 ÷ 510 = $23.53 per good die. ### takeaway The same wafer cost produces more saleable output. This is a yield calculation, not a claim about chip selling prices or total manufacturing cost. ## scenario ### change Demand falls after a capacity expansion. ### effects - Wafer starts decline while much equipment depreciation and facility cost continue. - Cost per processed wafer rises if fixed overhead is allocated across fewer wafers. - Discounting can recover some volume but does not necessarily restore margin; management must separate temporary inventory correction from lasting product weakness. ### watch - Process-specific utilization - Customer inventory and order cancellations - Yield on new products ## misconceptions ### claim The smallest process node is best for every chip. ### correction Cost, voltage, reliability, analog performance, and lifecycle requirements can favor other processes. ## sources ### id asml-process ### title How microchips are made ### organization ASML ### url https://www.asml.com/en/technology/all-about-microchips/how-microchips-are-made ### supports Fabrication sequence, inspection, packaging, and the distinction between chipmaker business types. ### id asml-steps ### title Six crucial steps in semiconductor manufacturing ### organization ASML ### url https://www.asml.com/en/company/stories/2021/semiconductor-manufacturing-process-steps ### supports Process precision, pattern transfer, deposition, etching, and packaging; updated 2023. ### id tsmc-model ### title Dedicated IC Foundry ### organization TSMC ### url https://www.tsmc.com/english/dedicatedFoundry ### supports Primary company description of manufacturing customer-owned products under the foundry model. ### id census-naics ### title 2022 NAICS definition: Semiconductor and Related Device Manufacturing ### organization U.S. Census Bureau ### url https://www.census.gov/naics/?details=3344&input=3344&year=2022 ### supports U.S. classification boundary and the code mapping; a partial match is not equivalence between this article and every establishment in the code. ## evidence ### scope - asml-process - tsmc-model - census-naics ### flow - asml-process - asml-steps ### economics - tsmc-model - asml-steps ### operations - asml-process - asml-steps ### structure - tsmc-model - asml-process ### risks - asml-steps ## related Concepts - yield - capacity-utilization - capital-intensity - switching-costs ## classification ### system NAICS ### edition 2022 ### code 334413 ### label Semiconductor and Related Device Manufacturing ### match partial ## editorial Note Process descriptions draw on the cited primary sources. Business-model interpretation is editorial synthesis; worked-example figures are illustrative assumptions, not industry benchmarks. Regulation and commercial arrangements vary by jurisdiction. Classification mappings use the U.S. 2022 NAICS edition; partial mappings indicate overlapping rather than identical scope. ## companies ### selection Note Illustrative companies spanning contract wafer fabrication, integrated device manufacturing, memory, and outsourced packaging and testing. This is not a ranking by revenue, capacity, or technological leadership. ### verified On 2026-10-26 ### entries #### name ASE Technology Holding #### kind Company group #### segment Packaging and testing #### description Provides semiconductor packaging, testing, and system assembly through its operating companies. It illustrates how specialized contractors turn fabricated dies into packaged, qualified components. #### url https://www.aseglobal.com/about/ #### name GlobalFoundries #### kind Company #### segment Contract wafer fabrication #### description Manufactures chips for customers using technologies including radio frequency, power, and silicon photonics. Its foundry model separates customer product design from operating fabrication facilities. #### url https://gf.com/ #### name Infineon Technologies #### kind Company #### segment Power semiconductors #### description Supplies power semiconductors using silicon, silicon carbide, and gallium nitride technologies. These products illustrate manufacturing requirements shaped by energy conversion and control applications. #### url https://www.infineon.com/products/power #### name Intel #### kind Company #### segment Fabrication and advanced packaging #### description Operates wafer fabrication and advanced packaging facilities through Intel Foundry. Its manufacturing services illustrate the relationship between process technology, packaging, testing, and customer qualification. #### url https://www.intel.com/content/www/us/en/foundry/manufacturing.html #### name Micron Technology #### kind Company #### segment Memory and storage #### description Produces semiconductor memory and storage products, including DRAM and NAND. Its manufacturing network illustrates the process investment and product specialization involved in memory production. #### url https://www.micron.com/about/company/corporate-profile #### name Samsung Electronics #### kind Company #### segment Memory and foundry services #### description Its semiconductor business supplies memory, processors, image sensors, and foundry services. It illustrates a company participating in several chip categories with different customer requirements. #### url https://semiconductor.samsung.com/ #### name SK hynix #### kind Company #### segment Memory semiconductors #### description Supplies DRAM, NAND storage, and solid-state drives for computing and connected devices. Its portfolio illustrates the distinction between memory components and assembled storage products. #### url https://www.skhynix.com/ #### name STMicroelectronics #### kind Company #### segment Integrated device manufacturing #### description Designs, manufactures, and sells integrated circuits, handling much of production internally. It illustrates the integrated manufacturer model across wafer fabrication, packaging, and product support. #### url https://www.st.com/content/st_com/en/about/manufacturing-at-st/semiconductor-value-chain.html #### name Texas Instruments #### kind Company #### segment Analog and embedded chips #### description Designs, manufactures, tests, and sells analog and embedded processing chips. These components illustrate manufacturing tied to power management, sensing, communications, and control functions. #### url https://www.ti.com/about-ti.html #### name TSMC #### kind Company #### segment Contract wafer fabrication #### description Manufactures customers’ semiconductor designs and provides advanced packaging services. Its dedicated foundry model illustrates the coordination required between chip designers, fabrication processes, and production capacity. #### url https://www.tsmc.com/english Examples are illustrative, not benchmarks. Editorial method: https://industrywiki.org/methodology/